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Current Issue
The International Reference for Chip-Scale Electronics, Flip-Chip Technology, Optoelectronic Interconnection and Wafer-Level Packaging
October 2002

SEMICON West 2002 Revisited: Expectations Were Fulfilled
Steve Berry and Sandra Winkler
Contributing Editors

One of the realities of trade publications is that articles are written many weeks, sometimes months, prior to publication.

This article was written a few days after the conclusion of SEMICON West and just as Semiconductor Equipment and Materials International (SEMI) released its June financial information for the semiconductor equipment industry.

PhoPack Symposium

The assembly and test portion of SEMICON West ran July 17-19. For the first time in history, the back-end portion of the show preceded the front-end portion that occurs in San Francisco.

Activities really began at Stanford University on Sunday, July 14, the beginning of the PhoPack 2002 Symposium. PhoPack was a three-day event, with one day of short courses followed by a two-day symposium.

PhoPack covered photonic devices and systems packaging, one of the important topics in the semiconductor industry today, in spite of the current downturn in telecom.

The shipments and bookings data released by SEMI during SEMICON West indicate that industry fortunes are trending upwardÑjust not as quickly as anyone would like to see.

Fine-pitch wire bonding, which can be classified as anything under 50 µm, was a hot SEMICON topic. The focus of Kulicke & Soffa is 35 µm, which can be achieved by moving the lead fingers closer to the die, using 3M's polyimide flex tape.

A low-cost substrate is the key to bringing the costs down to where they are advantageous over flip chip.

Slow Capillary Action Needed

Next generation wire bonders, which can slow capillary action prior to impact to prevent damage at this level, are also needed. Using two loop heights, 2.5 mils and 5 mils high, and 15-µm wire are also necessary to prevent wire wash. Reverse wire bonding to achieve different wire shapes has already been perfected for use in 3D packaging, for the same reason.

An idea presented by FhG-IZM, ISM-M and TU Berlin is 3D integration, where semiconductor chips can be interspersed within layers of a PWB with microvias, creating a functional block.

Thinning the dice, which is already occurring in 3D packaging, is necessary. Thinning down to 50 µm is best from a heat-management point of view, although maintaining reliability in volume is at question.

Wafer Thinning

Currently, 75 µm is the bleeding edge of wafer thinning, while 125 µm is reliably being done in volume. Bluetooth is a possible application for this technology.

Whether SEMICON West was a "good" show or not depended on one's point of view.

Those exhibitors expecting great results were generally disappointed. On the other hand, exhibitors who approached the show with modest expectations generally felt that they were rewarded with some positive leads for new business.

Upbeat About Longer Term

Even though the semiconductor industry has gone through its worst downhill slide in history, the industry's leaders are upbeat about the longer-term prospects, even though many people are fretting about the near-term outlook.

The shipments and bookings data released by SEMI during SEMICON West indicate that industry fortunes are trending upward-just not as quickly as anyone would like to see.

The North American book-to-bill ratio was 1.09 for the first half of the year and 1.26 for the second quarter.

Revenue for the second quarter was higher than the first quarter of 2002, but rather anemic compared to the second quarter of 2001. While a recovery may be in progress, it seems to be a rather weak one.

Electronic Trend Publications (ETP), San Jose, is a market research firm specializing in all phases of electronics manufacturing, from wafer fabrication through final assembly. [electronictrendpubs.com]

 
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