PATENT NUMBER:

6,091,141

ASSIGNEE:

Anam Semiconductor and Amkor Technology

INVENTOR:

Young Wook Heo

TITLE:

Bump Chip Scale Semiconductor Package

Termed a CSP, this wafer-level package is a very simple one: Wire bonds are used to form preliminary bumps, which are then augmented by adding solderable bumps.

A suitable thin film passivation layer is applied to the wafer with openings formed for the bond pads.

Wire-bonded bumps are then formed on each pad. In the primary embodiment, the bonds have tails, with the total height of the bond and tail between 10-3010 and 30 mils.

Next, a thicker polyimide or epoxy resin layer is applied. This layer covers the bond, but leaves part of the tail exposed. This insulating layer is then cured, and the exposed wire bond tails are coined.

In one variation of this process, a flux is applied and solder balls are placed over each coined wire and reflowed. The result is a bump suitable for mounting on a PWB and one which that is decoupled from the IC. Each solder ball has a coined gold wire as its central core.

Wafer-level package formed using wire bonding

A number of interesting variations are described in this patent.

Instead of applying flux and solder balls to the coined wires, solder paste can be screened and reflowed, resulting in the formation of suitable solder bumps.

Alternatively, the wafer can be coated with a suitable flux and then inverted and immersed in a solder pot or run through a wave solder machine to form the desired bumps.

This last approach should make it possible to bump only die that are probed and known to be good–assuming that test data can be fed to the wire bonder. (Only the good die have tails and thus are the only devices that are bumped.] .)

Wire bonds can be formed using either gold wire or solder wire. Solder wire is more expensive and will increase the bumping cost, if used.

With solder wire, the tails can be fused to form small bumps through the normal surface tension of the solder. These small bumps are then covered with eutectic solder, using one of the described methods.

Solder wire can also be formed to have a tail just like gold wire and processed in a similar fashion.

In yet another variation, the gold wire bond is formed without a tail. A second bump is then formed on top of the first bump with solder wire. This one has a tail and one of the above methods is used to form bumps.

All of the above processes can be formed at the wafer level, and sawing the wafer results in packages ready for mounting on a PWB.

After separation, the individual devices can be placed into a suitable cap that covers all surfaces of the die except the bumped front surface.