By Toshio Hamano, Fujitsu Microelectronics Inc., San Jose
January 2007 is the target date for a total ban on hazardous materials, including lead, in Europe. This target is based on proposals from the June Council of Ministers of European state governments. Our company prepares a broad range of lead-free packages for ASICs, memory, microcontrollers and other LSI devices (Figure 1). This article examines the lead-free trend in Japan and our company's solutions for achieving lead-free CSPs with both unit and board-level reliability. Lead-free Activity in Japan The Japan Welding Engineering Society (JWES) developed the basic characteristics for lead-free materials. Meanwhile, the Japan Electronic Industry Development Association (JEIDA) was charged with determining the feasibility and reliability of lead-free assembly. JEIDA's Lead-free Soldering R&D Project Committee proposed the Roadmap 2000 for Commercialization of Lead-free Solder, V. 1.3 in July (shown in Figure 2). Many Japanese suppliers of consumer and portable electronics are trying to eliminate lead from their entire product lines by next December (as shown in Table 1).1
The suppliers have proposed a variety of compositions. However, it is becoming an industry standard in Japan to employ Sn-Ag-Cu, although Sn-Ag-Cu-Bi2 or Sn-Zn-Bi has been already used by some companies. Our company selected Sn-Ag-Cu as lead-free ball material for most packaging. The exceptions are the EBGA and FCBGA. For these packages, we have selected Sn-Bi-Ag, because they offer a larger heat mass. This larger area enables the use of a lower melting temperature3. Lead-free Benefit for CSPs The use of Sn-Ag-Cu introduces a large concern over high-temperature endurance during the reflow process of the board mounting. At reflow, the temperature becomes 250 to 260°C, because the liquidus point of Sn-Ag-Cu is about 215 to 220°C. Our lead-free solution improves the material properties and package structures to achieve endurance at 260°C. With the higher reflow temperatures required in a lead-free setting, we again realized the importance of the polyimide tape substrate in some packages. Die attach and mold resin were also important factors that needed to be modified. The Sn-Ag-Cu alloy improves board-level reliability, because it presents better characteristics against stress fatigue, compared to a conventional eutectic solder, such as 63Sn37Pb. CSP Structures We developed a variety of CSP packages for various applications, as described in Table 2. In November 1999, we announced plans for a staged reduction in the use of lead in our products. Initially, a new lineup of LSI devices and packages became available with lead-free solder in October 2000. Some of the packages, such as the Bump Chip Carrier (BCC/BCC++)4 for RF devices, Ultra-thin Fine-pitch Land Grid Array (UT-FLGA) for mini disk drive chipset, and Super CSP (Wafer-level CSP) for flash memory, were designed as lead-free solutions from the start.
Flip Chips There are many factors to consider when processing lead-free flip-chip packages, since they depend on a relatively large amount of solder, compared to wire bonded packages. A flip-chip BGA (FC-BGA), for example, is composed of external solder balls, as well as internal bump interconnections used with various types of substrates. We have manufactured lead-free FC-BGAs for high-end products using Sn-Ag bumps and high-CTE glass ceramics. The selection of the appropriate materials set, e.g., underfill, lid, thermal compound and substrate is essential. Reliability We qualified the lead-free CSPs in unit and at board-level reliabilities. Table 2 shows the summary of the Moisture Sensitivity Level (MSL) of JEDEC, board-level temp-erature cycle test (T/C), bend cycle test, and drop test. All showed excellent results, because we developed our own die attach material and molding resin. We also introduced a unique package structure to prevent "pop-corning" at 260°C. All our lead-free CSPs meet JEDEC MSL over MSL 3 at temperature. The board-level T/C reliability from our lead-free process is better than eutectic solder, because the Sn-Ag-Cu composition introduces a dispersion effect due to the fine particles of Ag3Sn and Cu6Sn5. All our lead-free CSPs also meet the 63% cumulative failure over 2000 cycles at a temperature of -25°C to 125°C.
Conclusion In preparing for totally lead-free manufacturing of electronics, as mandated by European and Japanese organizations, many Japanese companies, including ours, have developed special programs aimed at the complete removal of lead solder from IC packages. In our case, we believe the use of Sn-Ag-Cu as the lead-free ball medium for CSPs offers excellent reliability at both the package and board level. References 1. Y. Yamagishi, "The Current Status of Pb-free Solders in Japan," Proc. IPC Works 2000, Sep. 9-14, 2000, p. S-01-8. 2. K. Imamura et al., "Joint Reliability of BGA with Pb Free Solder Bump," Proc. IEMT/IMC 2000, April 19-21, 2000, pp.116-121. 3. M. Aguirre, "Fujitsu's Lead-free Packaging," Proc. 3rd MEPTEC/San Jose State University Lead-free Solder Implementation Summit, August 30, 2001. 4. T. Hamano, "Miniaturization Feeds the Demand for Innovative New Chip Carrier Packages," RF Design, November 1999, pp 50-56.
|
||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Copyright © 2001