Cookson Electronics Equipment Places New Emphasis on Chip Packaging Tools Editor's Note: Pierre de Villemejané is the president and CEO of Cookson Electronics Equipment (CEE), formerly known as Speedline Technologies. The company's brands include Accel, Camalot, Electrovert, MPM, Specialty Coating Systems and SGS. This is the first in an occasional series reporting on the views of the industry's leaders. Chip Scale Review interviewed Mr. de Villamejané in September.) Franklin, Mass.-Pierre de Villemejané, Cookson Electronics Equipment's top gun, is a man on a mission and a man with a lot of work to do. CEO for just slightly more than a year, de Villemejané inherited a massive company (part of the giant Cookson PLC Group) with several industry-leading brands. However, he took over the helm just as the recession was chewing bites out of the equipment buyers' budgets. While known as Speedline Technologies- less than a year ago-CEE had become the 1,000 pound gorilla of the dispensing, cleaning, reflow and stenciling equipment market, with few worrisome competitors. During last year's fourth quarter, by then roiled from the worldwide recession, de Villemejané cut his company's U.S. and European workforce by 250. Recently, the company employed about 750. Despite the name change, CEE's vision has not "radically changed." CEE, says de Villemejané, is continuing to focus on being "the leading supplier of equipment, software and service solutions to both the high end and midrange customer segment of two core industries: electronics assembly and semiconductor packaging." He defines the "high end" as technology-driven customers in military, telecom and medical markets. Midrange is more productivity driven, such as the consumer electronics field. CEE, however, is placing a renewed emphasis on software. "Software is key for our discrete equipment-everything related to vision, alignment, inspection, speeding up cycle time." It's vital, he says, for CEE to provide software assistance to customers on a line basis. Another important point is the company's new focus on semiconductor packaging, he adds. "In the past, I think our brands were viewing semiconductor packaging as a nice-to-have market. If it took no pain, great! Otherwise we were not really focusing on that market. "We've changed that strategy radically, and we see semiconductor packaging as a core area for us and as a core technology influence." He observes that much of the technology developed for semiconductor packaging finds its way into SMT manufacturing, CEE's other core market. Used Equipment With most customers avoiding new equipment buys, CEE has aggressively moved into the used equipment market. CEE takes in its used equipment, refurbishes it-making it like new-recertifies the equipment, places it under warranty and then sells it. "This makes a very strong offering compared to traditional used equipment brokers," Villemejané maintains. Key business drivers at CEE are advanced deposition, advanced thermal management, optoelectronics and high frequency. Those are the major technology needs impacting CEE's R&D for new equipment, he says. Disco Corp. Readies Laser Saw for March 2003 Delivery Tokyo-Disco Corp. is readying a 300mm-capable automatic laser saw, able to remove low dielectric constant material (Low-k), for March 2003 delivery. The saw can process high-speed devices without causing damage by employing a short-pulse laser. The unit is scheduled to be shown at SEMICON Japan in December. Known as the model 7160, the saw uses a newly developed laser engine and is based on a hardware and software platform developed for the company's DFD6360. Disco says it plans to expand applications for the saw to include ultra-thin silicon wafer dicing and sapphire substrate dicing. [disco.co.jp]
Intel Researchers Develop 3-D Transistor Design Tokyo-Intel researchers have developed a three-dimensional tri-gate transistor design claimed to achieve higher performance with greater power efficiency than traditional planar transistors. The microprocessor leader calls the development "the first glimpse of a new era of non-planar 3-D transistor designs that Intel and the semiconductor industry must implement to maintain the pace of Moore's Law beyond this decade." "Below 30 nanometers, the basic physics of the flat, single-gate planar transistor leaks too much power to meet our future performance goals," according to Dr. Gerald Marcyk, director of Intel's Components Research Lab. The new transistor design will enable Intel to build ultra-small transistors that achieve high performance with low power and continue Moore's Law, according to Dr. Marcyk. The triple-gated transistor takes the flat transistor and raises it above its silicon base, allowing signals to travel on top and along both vertical side walls-three current paths-without using more space. The tri-gate structure is promising for extending the TeraHertz transistor architecture Intel announced in December 2001, the company says. Its raised source and drain structure provide lower resistance so it is driven with less power. The design is compatible with the future high K gate dielectrics for even lower leakage. Intel researchers discussed the new tri-gate transistors at the recent International Solid State Device and Materials Conference in Nagoya, Japan. [intel.com/research/silicon] QPL Opens Second China Facility Hong Kong-QPL has opened a new 300,000 square foot manufacturing facility in Guangdong, China. The plant includes a Class 5000 clean room and will enable QPL to increase its capacity for plating and finishing stamped leadframes. It will also allow QPL to double its ability to make etched leadframes and thermal packaging products, such as heat spreaders and heatsinks. QPL currently maintains a China-based stamping facility. The company also announced that Larry Worth, recently promoted to vice president of sales and marketing, has relocated to QPL's new U.S. headquarters. [qpl.com] Analog Devices Intros High-Speed CSPs San Jose-Analog Devices Inc. (ADI) has become the first chip maker to offer high-speed converters in chip-scale packages. The result, says ADI, is a reduction in package size by up to 87 percent. [analog.com] EGsoft and Partners Offer Logic Diagnosis Software San Jose-EGsoft has developed software enabling chipmakers to locate the physical origins of electrical faults in random-logic IC designs. Partnering with Intel, International SEMATECH and Texas A&M University, the Electroglas division says the results of initial testing at Intel, Santa Clara, Calif., showed a significant reduction in the time needed to identify the physical cause of electrical failures. [electroglas.com] Olympus PDG Appoints Wang to Optical Products Mkt'g Post San Jose-Olympus Partnership Develop-ment Group (PDG) has selected Peter Wang for optical product marketing manager. Prior to joining PDG, Wang was senior product manager for Alliance Fiber Optic Products, also in San Jose. [olympus-ita.com] Iverson Replaces Quist as CyberOptics' President & CEO Minneapolis, Minn.-CyberOptics Corp. recently appointed Kathleen (Kitty) P. Iverson president and CEO in a planned management transition. Iverson, who joined CyberOptics as president and COO in January, replaces Steven M. Quist, who headed the company since 1998. Quist and Iverson will both continue on the board of directors. KIC Opens First European Office; Moreau Named GM San Diego, Calif.-KIC, a supplier of thermal management products, has opened its first European office in the United Kingdom. Miles Moreau has been named GM for KIC Europe and will be based at the new office in Wokingham, Berkshire, England. Moreau joined KIC in 1992 and has served as vice president for R&D for 2H years. [kicthermal.com]
Tessera Says Its New microZ Is the Smallest Stacked Package San Jose-Tessera Tech-nologies says its new microZ "fold-over package" represents the world's smallest stacked package. At some 35 percent smaller than currently available formats, the package is designed to help OEMs meet cost and size reduction roadmaps for mobile electronic products. The adoption of current MCP and 3D package technologies is limited by the supply of known-good die in wafer form and mixed-device testing logistics. Tessera says the microZ package addresses these problems by using current package footprints, pin-outs and existing assembly and test procedures. The fold-over technology combines a high I/O device, such as a DSP, with multiple memory devices. The higher pin-count device is mounted on a flexible substrate. The substrate and adjoining traces extend from one end and are folded over to provide a surface-mountable interface on top of the higher pincount device. [tessera.com] FSA Survey Says Worst May Be Over, as Wafer Demand Grows San Jose-The Fabless Semiconductor Association says "The worst may be over," signaled by a 9 percent hike in actual wafer demand for Q2 over Q4 last year. The Q2 2002 9 percent quarter-over-quarter increase in aggregate actual wafer demand indicates that the recovery will be "moderate and gradual with considerable individual company variability." [fsa.org] Gowda Awarded Hutchins Grant Binghamton, N.Y.-Arun Gowda, who is working in the Universal Instruments Advanced Surface Mount Technology Laboratory, has been awarded the SMTA's Charles Hutchins Education Grant. Gowda is a graduate research associate with the State University of New York, Binghamton. [uic.com]
Pac Tech USA Plans November '02 Completion of U.S. Facility Santa Clara, Calif.-Pac Tech USA, a wholly owned subsidiary of Pac Tech GmbH, expects to complete its 2000 square foot wafer bumping and solder stencil printing facility in November. The facility will offer contract services with a PacLine 2000 A50 and will be located within Pac Tech's existing U.S. headquarters at 328 Martin Ave., Santa Clara. The line will accommodate wafers up to 300mm and is scheduled to be ISO 9001 certified in Q3 2003. The PacLine 2000 will be able to bump 600,000 wafers per year, according to Dr. Thorsten Teutsch, CTO. In addition to the PacLine 2000 services, the company will offer solder ball bumping with its new solder jet SB2 equipment, which is designed for single ball placements in prototyping, flexible ball placement and laser reflow of solder balls. [pactech.de] MTBSolutions Announces Move San Jose-MTBSolutions, specialists in developing intellectual property in IC packaging, has moved to new quarters at 2540 N. 1st St., San Jose. The new phone and fax numbers are phone 408.570.9711, fax 408.570.9720. [mtbsolutions.com]
Myers Named VP/GM of ASAT GmbH; Company Inks Prominent Pact Hong Kong-Industry veteran John Myers has been appointed vice president and general manager of ASAT GmbH. Based in Europe, Myers will be responsible for business development and customer service on the Continent. He reports to Harry Rozakis, ASAT Holdings CEO. Prior to joining ASAT recently, Myers was director of key accounts at CS2, Belgium. Earlier, he was business development manager for Tessera, San Jose, based in Europe. He holds an MBA from the University of Dallas and a BSEE from Washington University, St. Louis, Mo. ASAT Holdings Ltd. also recently announced that it will supply Prominent Communications Inc., San Diego, with packaging and test services for the latter's transmitter and receiver ICs. Additionally, ASAT will provide full turnkey assembly and test to Prominent for multiple Bluetooth and wireless LAN products, as well as PDAs and computer peripherals. [asat.com] Fujitsu, Amkor End Kyushu Talks Tokyo-Fujitsu Ltd. and Amkor Technology, Chandler, Ariz., have ended talks aimed at making Kyushu Fujitsu Electronics Ltd. in Kyushu, Japan, a joint venture. The companies began discussions last April. A recent announcement from Fujitsu said "both companies concluded that the transactionÉwas not feasible." [fujitsu.com]
SEMI Awards Honor Innovators San Jose-SEMI recently honored eight technologists for "significant contributions to the advancement of semiconductor manufacturing technology" at SEMI's 29th annual awards ceremony. Shown from left to right are Carl Smith, Tom Hedges, Tom Schaefer, Mark Zimmer and SEMI President Stan Myers. Roger Sturgeon is at the podium. Not shown are Glenn Tom, W. Karl Olander and lifetime achievement winner Richard Spanier of Rudolph Technologies. (Chip Scale Review) |
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