November- December 1998
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High Reliability Telecommunications Equipment: A Tall Order for Chip-Scale Packages
A concern with CSPs currently on the market is whether the attachment reliability will be adequate for certain segments of the telecommunications market.
-By Dr. Theo I. Ejim, Lucent Technologies, Princeton, N.J.
Abstract
While chip-scale packages provide board real estate benefits, their usability in certain segments of the electronics industry is still somewhat in question. The attachment reliability of some current CSPs falls short of the requirements for telecommunications transmission and switching products that require 10 to 20 year lifetimes with less than 200 ppm cumulative failures. The feature size reductions that are necessary for chip-size packaging, in most cases, results in very low PWB level attachment reliability values relative to Plastic Quad Flatpacks (PQFPs) and the larger plastic BGAs.
This paper details attachment requirements for high reliability telecom equipment and predicts which current CSP designs are likely to meet those requirements. These findings are based on thermal cycling tests and on thermo-mechanical measurements using moiré interferometry.
While there is proliferation of CSP packages from many companies, the vast majority of these packages can be categorized as belonging to one of the following types:
- 1. Packages that are built on flex-circuit interposers
Examples are the Flex-BGA (or FBGA) in which the die is attached directly to a thin flex tape and the Tessera BGA package, in which an elastomer is inserted between the tape and the silicon die. - 2. Packages built on rigid substrate interposers
Examples are the small-form plastic BGAs (miniBGAs) built on rigid organic laminates and ceramic fine-pitch BGAs. - 3. Packages assembled at the wafer level
Examples include the ShellCase CSP and the ChipScale Inc. MicroSMT. - 4. Packages built on leadframes
These include the small outline, no lead (SON) package or leaded packages.
| Table 1. Physical Properties of CSP Packages Tested | ||||||
| Package Type | Pitch | I/O | Solder type | Lead material | Die size (mm) | Pkg. size (mm) |
| µBGA | 0.75 | 40 | eutectic | Au-lead | 5.79 X 7.53 | 5.79 X 7.53 |
| µBGA | 0.75 | 46 | eutectic | Cu-lead | 5.36 X 7.46 | 5.76 X 7.87 |
| FBGA | 0.8 | 48 | eutectic | wire | 4.3 X 6.4 | 6 X 8 |
| FBGA | 0.8 | 48 | eutectic | wire | 4.3 X 6.4 | 9 X 6 |
| miniBGA | 0.8 | 144 | eutectic | wire | 4 X 6 | 10 X 10 |
| Ceramic | 0.8 | 48 | high temp | Flip-Chip | 7 X 7 | |
Experimental
The experiment discussed here was conducted with daisychained packages from several vendors. The packages included the BGA construction, the FBGA construction, the rigid organic laminate construction (miniBGA) and the ceramic BGA construction. All of the packages utilized an 0.8 mm ball pitch with the exception of the BGA package, which has a 0.75 mm pitch.
Eutectic solder balls were used in all packages except for the ceramic package, which utilized high temperature solder balls. Table 1 shows the physical properties of the packages. The pinout range of these packages was from 40 to 48 I/O. The ceramic BGA and the miniBGA were evaluated with the Lucent Comprehensive Surface Mount Reliability (CSMR) model.2 Thermal cycling data of similar packages was correlated earlier with the model. The BGA package and the FBGA were evaluated with thermal cycling and moiré interferometry.
| Table 2. Surface Mount Assembly Results | |||
| Package | # Components Assembled | Solder Joints | |
| FBGA (48 I/O) | 440 | 21,120 | |
| µBGA (46 I/O) | 160 | 7,360 | |
| µBGA (40 I/O) | 80 | 3200 | |
| µBGA (188 I/O) | 160 | 30,080 | |
| Total | 1200 | 61,760 | |
Assembly
Selected packages were surface-mount assembled on an eight-layer board for the thermal cycling test. The eight-layer board contained blind microvias-in-pad, which were laser drilled. As shown in Table 2, a total of 1200 packages (or over 54,000 solder joints) was assembled without defects, such as electrical opens and/or shorts (solder bridges). These low I/O CSP packages do self-center during reflow just like the high pitch BGAs.3 Consequently, the high assembly yield of 5 to 10 ppm joints, that has been demonstrated for high pitch BGAs, should be attainable with these low I/O CSPs.
| Figure 1. Moire fringes of the bottom surface of a CSP with thin flex-tape interposer |
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| U fieId (X-direction), CTE under the die is 4.2 PPM/ °C |
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| V field (Y-direction), CTE under the die is 4.5 PPM/°C |
A concern with all CSP packages currently on the market is whether the attachment reliability will be adequate for some segments of the telecommunications market. In this work, the attachment reliability was evaluated using thermal cycling and/or moiré interferometry and modeling. The thermal cycling conditions were as follows:
- 0°C to 100°C at 20°C/min ramp rate
- Five minutes dwell time at both hot and cold ends
- In-situ continuity monitoring with 1000 ohm, 0.2 microseconds spike as failure
Moiré interferometry required the package solder balls to be ground off. A 1200 lines/mm cross-line grid pattern was then replicated onto the ground surface at 82°C. The moire fringes were obtained at room temperature (22°C) using a reference grating of 2400 lines/mm or 0.417 micron spacing per line. The displacements captured by the fringes (as shown in Figure 1) were used to calculate the effective CTE of the package between 22°C and 82°C. The CTE of the FBGA is lowest in the area under the silicon die, as indicated by the fewest fringes per linear unit
Second-Level Attachment Reliability Requirement
This section will discuss a baseline second-level reliability requirement for high reliability telecom equipment. In later sections, the selected CSPs are compared against this baseline. The assumptions and test conditions used in the baseline are shown in Table 3.
| Table 3. Parameters Used for Baseline Telecom Equipment Reliability | |
| Substrate (FR-4) CTE | 17 ppm |
| Thermal test condition (laboratory) | 0°C, 5 min ramps and 5 min dwells (20 min/cycle or 72 cycles/day) |
| Product reliability |
<200 PPM cumulative failure over product design life time |
| Data analysis | Two-parameter Weibull Statistics |
| Product use environment | DT of 30°C, one cycle per day |
| Product lifetime | 20 years |
The laboratory test reliability can be related to the product life reliability through Weibull statistics as in the equation below:
where Fcum is the cumulative failure, <200 ppm tcycle is the product life time in cycles, 20 years @ 1 cycle/day is 7350 cycles ñ is the Weibull characteristic life (cycles for 63.2% failure) ß is the Weibull slope which is indicative of variability in quality of samples, minimum of 4 for area array packages. A is the acceleration factor between laboratory test and product use environment.The acceleration factor is used to relate two thermal test conditions and, in this case, the laboratory test results to the product field environment. The value of the acceleration factor is dependent on the model employed.
A published model for generating the acceleration factor, based on a modified Coffin-Manson equation, is the Norris-Landzberg model shown in equation 2 below.4
Using this equation, the acceleration factor for the thermal test condition and product use environment in Table 2 was calculated to be 4.3. Substituting this number in equation 1 indicates that a minimum two-parameter Weibull characteristic life, N63.2 of 15,345 cycles is required to meet telecommunications equipment reliability.Using the set of parameters in Table 3 and substituting the product reliability of 200 ppm/device cumulative failure at the end of 20 years at one cycle/day, equation 1 becomes the following equation 3:
which is used to calculate characteristic life, N63.2 values. Table 4 shows the calculated N63.2 values required to meet the telecom reliability with different acceleration factors and two different Weibull slopes, 4 and 5, which are common for BGA-type CSPs.Using the Lucent CSMR model, the acceleration factor for the CSPs discussed in this paper range from 7 to 11 based on the material properties of the package. The CSMR model is based on inelastic strain energy calculations.2 For the BGA packages, the acceleration factor calculated with the modified Coffin-Manson is very conservative relative to those generated with the CSMR model. The modified Coffin-Manson equation, some researchers suggest, tends to overestimate the effect of temperature and underestimate the effect of frequency.5
With the acceleration factor of 7 to 11, the CSP packages should have a Weibull N63.2 of >6000 cycles and a Weibull slope of >4 to meet the minimum requirement for attachment reliability of telecom equipment with a 20-year design life in outside use environments.
| Table 4. Calculated N63.2 Values required to Meet Telecom Reliability | ||
| Acceleration Factor | Weibull N63 required for 20 years in telecom outside plant environment. | |
| Two-parameter Weibull slope 4 | Two-parameter Weibull Statistics | |
| 4 6 8 10 12 14 |
15343 10230 7672 6138 5115 4384 |
10025 6682 5012 4009 3341 2864 |
Discussion
Figure 1 shows a Weibull plot of the thermal cycling results of the FBGA with punched flex-tape interposer, a µBGA package with 6 mil thick elastomer between the tape and the die and 1.5 mm pitch plastic BGA with a 14-mil thick, rigid organic laminate.
The N63.2 for the FBGA is more than 4 times lower than the 1.5 mm pitch PBGA and does not meet the 6000 cycles, baseline value for telecommunication equipment. FBGA solder joint failures were due to bulk solder joint fatigue failure as shown in Figure 2. The first observed failures occurred in the solder joint at the edge of the silicon die. The CTE for this type of CSP is usually very low under the die, which results in a high CTE mismatch with the FR-4.
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| Figure 2: Weibull plot comparing reliability of CSPs with 1.5 mm pitch PBGA |
For the µBGA package, the N63.2 indicated in the Weibull plot is for failures inside the package. All initial evaluations of this package showed early failures inside the package due to copper ribbon breakage and/or ribbon bond failure.
The solder joints did not exhibit any failures after 9000 cycles. The solder joint reliability exceeds the telecommunications baseline value. The reliability concerns with this package are possible quality problems with the gold-coated copper ribbons and/or the ribbon bonds.
This ribbon problem must be resolved, otherwise the high solder joint reliability is useless.
It is well know that in the construction of this package a low modulus elastomer is used to decouple the die from the flex tape, shifting the CTE mismatch-driven stresses from the solder joints to the copper ribbon. Using moire interferometry, the effective CTE under the µBGA package was measured at 14 ppm/°C, showing that the presence of the elastomer reduces the impact of the silicon on the effective package CTE felt by the solder joint.
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| Figure 3: Solder joint fatigue failure of a fine pitch BGA with thin flex-tape interposer |
The two major contributors to the low reliability of CSPs are:
- Reduction of the package CTE because of the increased ratio of silicon content relative to the total package material volume.
- Reduction of feature sizes small solder-ball diameters and small surface mount pad area.
where N is number of cycles to failure h is solder joint height a is CTE mismatch between package and mother board A is the surface mount pad area AT is the change in temperatureIn Table 5, the CTE under the die for the 1.5 mm pitch plastic BGA is low, but the high surface mount pad diameter and the high solder joint standoff height resulted in a relatively high reliability For the CSP, the smaller ball pitches, 0.75 mm or 0.8 mm, limit the pad size and the ball diameter. The surface mount pad area and the solder joint standoff height are, by design, relatively small. This leaves the package's effective CTE as the main design parameter that vendors can use to tailor the attachment reliability of CSPs. Vendors either have to increase the effective CTE of the package or decouple the die from the solder joint. Recent publications show that some vendors are working on designs to increase the CTE of the CSPs.8
Using the effective package CTE values, currently available CSP constructions can be ranked in order of highest to lowest reliability on FR-4 as follows:
| Table 5. Measured Values for Design Parameters that Drive Reliability | |||||
| Package | Die Size | N63.2 | CTE (PPM/°C) | Pad Size (mm) | Joint Standoff Height |
| FBGA | 4.3 X 6.4 | 1130 | 4.3 | 0.4 mm | 0.35 |
µBGA with copper ribbon |
5.79 X 7.53 | 4932 | 14 | 0.4 | 0.2 |
µBGA with gold ribbon |
5.36 X 7.46 | >9000 | 14 | 0.4 | 0.2 |
| Rigid Organic Iaminate CSPs | 4 X 6 | 9 | 0.4 | 0.3 | |
| Ceramic CSP | 7 | 0.4 | 0.45 | ||
| 1.5 mm pitch PBGA | 10 X 10 | 5300 | 5.9 | 0.75 | 0.45 |
- µBGA package
- Rigid organic laminate CSP
- Ceramic CSP
- Flex BGA (FBGA)
The current construction of most fine-pitch ball grid array CSPs has not dealt with the package CTE issue adequately; as a result, these CSPs are not suitable for 20-year telecommunication applications. With CTE values as low as 4.3 ppm, the reliability of these packages is expected to be less than ceramic CSPs with equivalent package size. However, recent papers indicate that vendors are redesigning the FBGA packages to improve on the CTE value. The CSPs with BT-laminate can improve effective package CTE by increasing the laminate thickness, and, depending on die size, can meet the reliability requirements for telecommunications equipment requiring a 20-year design life.
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| Figure 4: Moire fringes from the bottom side of a CSP with rigid organic laminate are shown. CTE under the die is 9 ppm/°C |
- 1. K. Newman and M. Yuan, "Board Level Evaluation of Various Chip-Scale Packages," Proc. Chip Scale International, May 7,1998, pp.99- 113.
- 2. J-R Clech, J. C. Manock, et al., "A Comprehensive Surface Mount Reliability Model Covering Several Generations of Packaging and Assembly Technology," IEEE Trans. on CHMT, Vol.16, No.8, December 1993, pp.949-960.
- 3. A. Holliday, et al., "A Designed Experiment to Evaluate Assembly Defect Drivers for Plastic BGA Packages," Proc. Surface Mount International '95, August 29-31, 1995, San Jose, pp.305-312.
- 4. K. C. Norris and A. H. Landzberg, "Reliability of Controlled Collapse Interconnections," IBM f Res. Develop., May, 1969, pp.266-71.
- 5. R. Wild, "Military Cycle C4 Thermal Cycle Testing," IBM Technical Report #86-L85-002, February 1986.
- 6. T. I. Ejim, A. Holliday, et al., "A Designed Experiment to Determine Attachment Reliability Drivers for PBGA Packages," Proc. Surface Mount International '95, August 29-31, 1995, San Jose, pp.385-392.
- 7. L. S. Goldmann, "Geometrical Optimization of Controlled Collapse Interconnections," IBM f Res. Develop. 13, 251 1969.
- 8. R. D. Schueller, "New Chip-Scale Package with CTE Matching to the Board," Proc. of the 21st IEEE/CPMT International Electronics Manufacturing Technology Symposium, October 1997, pp.205-215.
Dr. Ejim received his bachelor's degree in chemistry from North Carolina Wesleyan College, Rocky Mount, N.C. and his master's and Ph. D. degrees in materials science from the University of Virginia, Charlottesville. He joined Lucent Bell Laboratories Engineering Research Center in Princeton, N.J. in 1982 as a Member of Technical Staff. During the past six years, he has been involved with board-level assembly quality and reliability for surface-mounted components. He can be reached at ejim@lucent.com or 609.639.2581 or by fax at 609.639.2343.