November- December 1998 - ChipScale Review

November- December 1998

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Achieving an Optimum Structural Package Design with Thermo-Viscoelastic Analysis

Viscoelastic analysis was employed on the Hitachi µBGA ® package to analyze resin structure and predict future package reliability.

-By Gen Murakami and Mamoru Mita, Hitachi Cable Ltd., Hitachi-City, Japan, and Shozo Nakamura, Keii Ueno and Keiichi Nakamura, Hitachi Ltd., Yokohama, Japan.

Figure 1. The µBGA package for the Direct Rambus DRAM
While electronic equipment has become increasingly lighter and more compact, higher density and greater reliability are needed in the field of device packaging. Since today's increasingly complex semiconductors also tend to be smaller and thinner in size, and faster in their operational packages has been gaining widespread acceptance.1,2

More than 50 different types of CSPs have been proposed. Most of these are based on a structure that employs TAB (tape automated bonding), in which a layer of copper circuits, composed mainly of polyimide materials, forms the wiring board.

The FBGA (fine-pitch ball grid array), which employs wire bonding, was developed and is being used for mass production. The FBGA, however, presents problems with heat radiation and high-speed transmission. As a result of these problems, the BGA package (Micro BGA), developed by Tessera Inc., San Jose, Calif., has attracted wide interest, particularly as a packaging format for the volume production of flash and other memory circuits. For next-generation PCs, several major semiconductor manufacturers have adopted the Direct Rambus DRAM, (RDRAM) using a circuit enhancement technology developed by Rambus Corp., San Jose. Mass production has already started with the RDRAM packaged in the Tessera format.

Figure 2. Cross section of the µBGA package
Package Structure

The µBGA package has a complicated structure. On one side of a µBGA-packaged LSI chip there are laminates of objects with different properties, such as the elastomer, Cu lead, polyimide films, sealing materials and solder balls.

Using a stress simulation method for the elastic area, based on conventional linear analysis produces data in which the analysis and experiment results are not in accord. In contrast, the most suitable method for analyzing resin structure appears to be viscoelastic analysis. Many products have already been put into practical use, using viscoelastic analysis. This analytic method is performed by inputting creep behavior data and alteration data of thermal property values and executing simulation.

We have analyzed thermal stress behavior within a package using the simulation method3-9 based on the viscoelastic analysis software we developed. In the process, we also developed a µBGA package with a new structure.

Figure 3. Dimensions for internal thermal stress analysis
This paper describes analysis results of thermal stress behavior of the µBGA package employed for the Direct Rambus Dram developed by Hitachi and shown in Figure 1 and Table 1. Later, we will report on analysis results of bonding behaviors of the lead bonding unit, solder ball unit and memory module.

Viscoelastic Analysis Numerical Simuiation Derivation of a Basic Formula

In simulating the viscoelastic analysis thermal stress and deformation, we derived a basic formula. This formula is based on the inner-laminate thermal stress that arises when a multilayer laminate with a rectangular cross section, made of a variety of e-number layers, is given a thermal load. This load shall be a function of the laminate's thickness-direction coordinate x and time t, and the function shall be named Õ (x, t). This Õ (x, t) can be expressed with the following formula if its constituent material is a linear viscoelastic analysis body and if the timetemperature conversion rule can be applied to it.10-12

Here, Eri (t1, T0) is a relaxation modulus at the basic temperature T0 at the i layer. Also,eÕ, (x, t) is the strain of the laminate in the longitudinal direction due to thermal stress. It may be expressed by the following formula:

Here, £ (t) represents expansion in the longitudinal direction; K (t) is a curvature; Th is held temperature; and T(x, y) is the temperature distribution that changes continuously. T(x, t) can be derived from a one-dimensional, non-stationary thermal conveyance formula13, based on the assumption that the thermal conductivity rate does not change due to temperature and is a function of x, the thickness-direction coordinate, and time t.ai (T) signifies the linear expansion coefficient of the material at temperature T at the i layer. Also, t' and †' in the formula ( 1 ) are conversion time, which can be obtained from the following formula, if the time-temperature shift factor at the i layer is set aito(T):

Because this laminate is not restricted from the outside through a registration process, the following force-balancing formula and the moment-balancing formula become valid.

Then, if formulas (4) and (5) are incorporated in formulas (1) to (3), the following differential/integral formulas are obtained:

Equations (6) and (7) are basic formulas for obtaining thermal stresses that occur when cooling a laminate, whether the cooling is rapid or gradual. If £ (t) and K (t) that satisfy formulas as (6) and (7) can be obtained, thermal stress distribution Ó-(x, t) that changes incessantly can be derived from formulas (1) and (2). And if Ó(x, t), £ (t), and K (t) still remain, even after the entire laminate is uniformly at the cooling temperature, they become residual stress Ór (x), residual strain £r' and residual curvature Kr.

Structure and Analysis Model of the µBGA Package

The cross-sectional structure of the µBGA CSP is shown in Figure 2. This CSP contains a structure in which thermal stress is absorbed by interposing soft-type elastomer between the LSI chip and the TAB tape. The end portion of the Cu lead of the TAB tape features a structure in which the end portion is sealed with epoxy resin-type materials.

We carried out viscoelastic analysis value simulation to obtain the thermal stress and warping deformation behavior of this CSP by forming a model of a laminate composed of multiple layers. The model, shown in Figure 3, was subject to analysis.

Figure 4 Different elastomeric structures for the µBGA package
In this case, the Cu lead and sealing materials were excluded from the objects of analysis because they cannot be reinforcement members. For this laminate, we took special note of the elastomer structure, which is expected to have substantial effects on the thermal stress of the BGA package and its warping deformation behavior. Three kinds of elastomer structures, Structure A, Structure B and Structure C, were observed.

Material Property Values Used

The thermal and mechanical characteristics of various kinds of materials composing the laminate shown in Figures 3 and 4 are shown in Table 2. Here, epoxy resin, an adhesive agent and low-elasticity epoxy resin are organic materials, and their thermal/mechanical characteristics are influenced greatly by time and temperature. Thus, these materials exhibit prominent thermo-viscoelastic behavior.

Figure 5. Master curve of relation modules for epoxy resin
We measured the dynamic viscoelastic analysis properties of the epoxy resin, the adhesive agent and the low-elasticity epoxy resin over a wide range from low temperature to high temperature, with frequency used as a variable parameter. The measurement results were plotted on the conversion logarithm time axis at the standard Temperature To' to form the master curve of the relaxation modulus. As an example, the master curve of the relaxation modulus for epoxy resin is shown in Figure 5. As the figure shows, the relaxation modulus of epoxy resin draws a smooth master curve between the minimum and maximum time.

The time-temperature shift factor in forming this master curve could be approximated with two Arrhenius' equations with different activation energy AH between the high temperature and low temperature portions, as shown in Figure 6.

Although omitted here, we were also able to obtain master curves similar to that of epoxy resin for both the adhesive agent and the low-elasticity epoxy resin. These curves verified that the epoxy resin and the adhesive agent employed displayed remarkable thermo-viscoelastic behavior, and are materials which follow the time-temperature conversion rule. These values were utilized in the viscoelastic numerical simulation.

Numerical Simulation

Regarding the laminate composed of the LSI chip, elastomer, the adhesive agent and polyimide films (shown in Figures 3 and 4), which converted the µBGA package into a model, thermal stress and warping deformation behavior that normally occurs when heat load is provided, were simulated using a computer.

For viscoelastic value simulation, the basic formula given earlier was expressed in the form of a finite difference, and calculation was carried out using a Hitachi S3800 supercomputer. In implementing the calculation, cooling temperatures ranged from 423°K to 218°K, based on the assumption that temperature cycle testing was to be enforced as part of the thermal reliability evaluation of the BGA package. We assumed that no thermal stress or warping deformation value occurred at the initial stage of 423°K. For the epoxy resin and adhesive agent, physical property values shown in Table 2, and the viscoelastic analysis value obtained by approximating the master curve of the relaxation modulus shown in Figure 5, (utilizing the Pronyclass figures in the following formula), were employed as physical property values of materials in viscoelastic numerical simulation.

Figure 6. Time/temperature shift factor a TO (t) for epoxy resin
Here, Ei is the coefficient of the Prony-class figure and is always positive, while †i represents relaxation time (†i › †i+l)' and n represents the number of terms of the Prony-class figure. Furthermore, values obtained by approximating the time-temperature shift factor with two Arrhenius' equations with different activation energy AH between the high-temperature portion and the low-temperature portion were utilized. Meanwhile, for the LSI chips, polyimide films, etc., the physical property values shown in Table 2 were employed. The heat transfer coefficient, at the time of subjecting this laminate to air cooling, possessed a value of 46W/mK, which was based on the results of preliminary testing.

Structure and Inter-Layer Thermal Stress

The results of an analysis series of inter-layer thermal stress (subject to viscoelastic numerical simulation) are shown in Figures 7-9. Figure 7 shows the results of our analysis of the interface between the LSI chip and the elastomer, where damage to the µBGA package, due to the thermal load during temperature cycle testing, is considered most serious.

The interfacial thermal stress difference was analyzed against the cooling time from 423°K. Here, inter-layer thermal stress refers to the difference between the thermal stress that arises on the side of the LSI chip and the stress that occurs on the elastomer side. This difference corresponds to the shearing stress that generates inter-layer delamination.

Figure 7. Chart illustrates interfacial thermal stress difference of a µBGA package during the cooling process
Figure 7 also shows that inter-layer thermal stress increases in line with the lapse of cooling time for all of Structure A, Structure B and Structure C of the elastomer. When the cooling time exceeds 50 seconds and the µBGA package reaches 218°K, the inter-layer thermal stress converges on a specific value. When these different elastomer structures are compared, the inter-layer thermal stress of Structure C, which is made of epoxy resin/fluororesin/epoxy resin, is smaller than that of Structures A and B, which are composed of a single layer of epoxy resin and low-elasticity epoxy resin/polyimide film/low elasticity epoxy resin in all cooling time zones.

Figure 8 shows a comparison of inter-layer thermal stress of the LSI chip and the elastomer at the room temperature of 293°K, with attention paid to the difference between Structure A, Structure B and Structure C of the elastomer. This figure shows that at the room temperature of 293°K, the inter-layer thermal stress of Structure B is 27% smaller than that of Structure A, while the thermal stress of Structure C is 25% smaller than that of Structure B.

The diffrence in stress is largely due to the difference in the thermal contraction force, based on the variance of the linear expansion coefficient and the elasticity modulus of the materials of the LSI chip (a solid body that shows elasticity behavior) and elastomer (a soft substance that displays thermo-viscoelastic behaviors).

The distribution of residual stress that arises within the interior of the laminate for Structure A, Structure B and Structure C is shown in Figure 9. This figure particularly demonstrates the distribution of residual stress at 218°K after the laminate is cooled from 423°K to 218°K in air, during temperature cycle testing.

This outcome characteristically shows that, while large tensile residual stress arises on the surface of the LSI chip, and compressive residual stress is generated on the interface portions of the inner epoxy resin, tensile residual stress is created in the interior of elastomer, the adhesive agent and polyimide films.

Figure 8. Internal thermal stress of different elastomers
Thus, the µBGA package, composed of miscellaneous materials, such as an LSI chip, elastomer, an adhesive agent and polyimide films, creates a complicated residual stress within itself. The various forces of stress mutually affect one another bringing about undesirable defective forms such as cutoff of Cu leads and inter-layer delamination at interfaces of materials.

A strong shearing force arises at the interface portions of the LSI chip and the epoxy resin of the elastomer in paticular. There is, presumably, a possibility that a rupture will develop on the surface of the LSI chip from this point or that—if the adhesion strength of the two is small—inter-layer delamination will occur at this point. The destruction of the LSI chip or inter-layer delamination occurs less frequently with Structure C than with Structures A or B, which indicates that Structure C is greatly superior in terms of connection strength and reliability.

Figure 9 Material residual thermal stress distribution of a µBGA package
Structure and Warping Deformation Behavior

Analysis results of the warping deformation that occur when the laminate is cooled from 423°K to 218°K in temperature cycle testing are shown in Figure 10. This figure shows that the warping deformation value greatly increases with a longer cooling time.

Results comparing Structures A, B and C for residual warping deformation value at the room temperature of 293°K are shown in Figure 11. In this figure, the warping deformation value of Structure C is 35-55% smaller than the corresponding warping deformation value of Structures A and B. These results indicate that, like the residual stress results, Structure C is greatly superior to Structures A and B in resisting warping deformation.

In this case, the warping deformation value, d of the laminate, was calculated from the curvature K obtained from viscoelastic numerical simulation, using the following formula:

Here, s represents the length of the laminate.

Figure 10. Warping deformation behavior during cooling
The reason that the complicated residual stress distribution and warping deformation behavior are seen within the material is that the bending rigidity of the structural body stems from differences in the linear CTE of materials and how they interact with each other. Accordingly, to prevent inter-layer delamination between constituent materials and to improve connection strength reliability of electronic devices, it is essential to optimize the design of constituent materials and structures used in the BGA package.

References

  • 1. S. Mori and T. Nishiwaki, "Design Specifications and Structure of CSP-Mounted Boards," Journal of Electronics Packaging Technology, Vol. 11, No. 2, 87 (1996).
  • 2. T. Nagahiro, "Practical Utilization of Next-Generation MPU and BGA Packaging Expected to Accelerate, Beginning with 200-Pin Class ASIC," Nikkei Microdevices, March 1997.
  • 3. S. Nakamura et al., "Viscoelasticity Analysis of Residual Stress That Arises When a Laminated Beam, Composed of Thermosetting Resin and Metals, Is Cooled," Collection of Treatises of the Japan Society of Mechanical Engineers, 53A, 1813 (1987).
  • 4. M. Obori et al., Viscoelastic Property and Internal Stress in the Curing Process of Thermosetting Resin," Materials, 43, 18 (1994).
  • 5. J. Ikeda et al., "Prediction of Warping Deformation That Occurs in the Soldering Process of Copper-Clad Laminates," Material Systems, 13, 79 (1994).
  • 6. S. Nakamura et al., "Viscoelastic Analysis of Thermal Stress That Arises When a Laminated Beam Composed of Thermosetting Resin and Metals Is Cooled," Collection of Treatises for Lectures of the Japan Society of Mechanical Engineers, No. 864 (2), 28 (1986).
  • 7. S. Nakamura et al., "Thermo-viscoelastic Analysis of Residual Stresses in a Thermosetting Resin/Metal Laminated Beam Caused by Cooling," JSME International Journal, 31, 126 (1988). 9. S. Nakamura and K. Serizawa, "Thermo-Viscoelasticity Analysis of Warping Deformation Behaviors and Residual Stress in an FCA Packaging Structure," Journal of Electronics Packaging Technology, Vol. 12, No.3, 173 (1997).
  • 10. M.L. Williams et al., "The Temperature Dependence of Relaxation Mechanisms in Amorphous Polymers and Other GlassForming Liquids," Journ.Amer. Chem. Soc., 77,3701 (1955).
  • 11. R. Muki, "Recent Progress of Linear Viscoelastic Theories," The Japan Society of Mechanical Engineers Journal, 64, 34 (1961).
  • 12. T. Kunio, "Basics of Solid Dynamics," Baifukan, Tokyo (1983), P.24.
  • 13. K. Kawashita, "Thermal Conductivity Theory," Ohm Publishing, Tokyo (1966), R 96.
Figure 11. Warping deformation of different elastomers
Contact co-authors Murakami and Mita at Hitachi Cable's Densen Works by e-mail to murakami@dns.hitachi-cable.co.jp and mita@dns.hitchi-cable.co.jp or by phone at +81.294.21. 1151, fax +81.294.124.0508. Contact co-authors S. Nakamura, Ueno and K Nakamura at the Production Engineering Reasearch Laboratory, Hitachi Ltd., Yokohama, Japan.

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