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Flip-Chip Market Expanding to Meet Speed, Performance Demands- By Steve Berry and Sandra Winkler, Contributing Editors Electronic Trend Publications, San Jose
Wire bond interconnection techno-logy has limits. To gain higher levels of speed, performance and I/O means shifting to 告p chip, whether that be directly on the printed circuit board or the electrical interconnection method in an IC package. Packages on the market today that offer 告p chip as an interconnect include BGAs, CSPs and MCMs. Bumping the die (done in wafer form) is at the heart of making the 告p-chip connection work. The bumps provide the electrical interconnections for the die. Bumping methods and materials include conductive polymers, gold interconnection, micro-bump bonding, and solder and stud bumping. Casio, and Citizen Watch Co., Delco Electronics and IBM were the first major users of 告p-chip technology for volume production. Delco employs 告p-chip technology for automobile parts, both under the hood and in instrumentation. It does not employ epoxy underfill, as its dice are small enough to eliminate the need for underfill. The electrical performance and small board footprint are obtained with very little inconvenience. The Citizen Watch Co. places 告p-chipped die on very small PC boards within watches. These boards are small enough to minimize losses in the event a die is bad and rework is impossible. Other applications followed. Sun embraced this technology for its microprocessors, from the Darwin workstations to the UltraSparc II. AMD's K6, a PGA, uses 告p-chip technology. Motorola also uses 告p-chip for the PowerPC and Hewlett Packard's PA-RISC also uses 告p-chip technology.
The forecasts for 告p chip are divided into direct attach usage, which consists of 告p-chip-on-board (FCOB), flip-chip-on-other (FCOO) and 告p-chip-in-package (FCIP). The latter derives from 告p-chip use in BGAs, CSPs and MCMs. (FCOB implies FR-4, while FCOO can be any other material, including ceramic or 呈x.)
The table summarizes the entire 告p-chip market. The overall use of 告p chip will grow from 569 million die in 1997 to about 2.5 billion die in 2002, a growth rate of 28.5 percent per year. The mix of "bare die" to "in package" will change dramatically during this time, due to the much higher growth rate of packages with a 告p-chip interconnect. |
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