March - April 1999
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First Contactless Electrical Test System for Bareboards Employs UV Laser
By Gene Weiner
Contributing Editor
The search for solutions to build the infrastructure for chip-scale packaging took us to Southern California in January, where we saw the first known truly contactless, bare board electrical test system in North America.
Noah Systems demonstrated its "alpha system" on one of several high density interconnect (HDI) substrates provided by prospective customers. The system uses a UV laser for processing samples and runs directly from a net list.
The current single laser machine is limited to a 10" x 10" part, and can test down to a 75 micron (3.0 mil) pitch design. The company has designed and sold five systems with simultaneous double-sided processing of panels up to 16" x 16." Testing a part with 9,000 test points takes about 10 seconds for set-up and 45 seconds for testing. A very fast system with four lasers will be available shortly. There are plans to produce a model capable of processing 18" x 24" panels within a year.
"Parallel Build"
While visiting Noah Systems, we learned of a nearby company, Ormet Corp., that is working on a build-up high-density substrate process that includes capacitors and resistors. Ormet's build-up process utilizes a photosensitive dielectric and a conductive ink to form multiple layers in a "Parallel Build" process to provide solid vertical interconnections between circuitry layers on BGAs, CSPs and other substrates.The Ormet system has produced 50 to 100 micron line and space patterns. An 8-layer substrate with 1,000 I/Os was made for testing by ITRI. The generation of fully planar surfaces of the built-up layers is an extremely interesting aspect of the system.
Additive Process
Sources from Tokyo state that 10% of the printed circuits produced in Japan last year were of the build-up type. More than 15% of 1999's production will utilize an additive process.Pundits there claim that the drive for smaller packages in Japan will result in more than 40% of all substrates being made by the additive process.
Japan's Ibiden is reportedly adding a new line that employs a photosensitive dry-film dielectric to produce packaging substrates for Intel. One source states that every new HDI design that he has seen in recent months "required" build-up processing and contained microvias.
A recent discussion with a spokesman for a U.S. packaging house led to the statement that it could compete with Amkor if the substrates were available in the U.S. The spokesman stated that he sees a big push to ramp up production of CSPs and flip-chip packages late in 1999 and early in 2000. His firm is quoting hundreds of millions of pieces. He also noted that passive components are replacing 1206s as part of the trend.
Infrastructure Lacking
He lamented, however, that the infrastructure to handle impending needs in the U.S. is lacking. He was concerned, since he had not developed trans-Pacific sources capable of handling the surge.The January issue of the Electronic Materials Report, Los Altos, Calif., substantiated this with a forecast that predicts CSP packages will grow from $750 million in 1998 to $2.1 billion in 2001. Portable appliances (cell phones, camcorders, digital cameras, notebook and palmtop computers) will be the main drivers for the increase.
Additionally, plastic BGA packages are expected to grow from $560 million to $1.5 billion in the same period. Ancillary products requiring advanced packaging will also grow dramatically in this period. Flash cards used in digital cameras, and hand held computing devices alone, are expected to increase from about $250 million last year to nearly $1 billion in 2001.
Lattice Semiconductor
Since our last article, Lattice Semi-conductor has announced the availability of advanced "near-chip-scale" chip array and fine pitch BGA packages for its ISP logic devices. Both feature ball grid arrays with ball pitches of 0.8 mm-1.0 millimeters. These reduce printed circuit board real estate by up to 70% while saving up to 90% in device weight, compared to standard PLCC and TQPF packaging.I'll wager that it won't be too long before Lattice goes all the way over to CSP packaging.
Mr. Weiner is editor/publisher of PAC/Asia Circuit News and is also a consultant to high technology companies. Contact him at 203.797.9103 or fax 203.797.9565. www.weiner-intl.com.