Tech Briefs

March 2015


Presto collaborates to develop 4G test solutions for automotive applications

by Debra Vogler, Senior Technical Editor


Cédric Mayor, CTO, Presto Engineering, Inc.

Presto Engineering recently announced that it has joined a France-based collaboration to reduce the cost-of-test (CoT) of automotive-grade 4G radio-frequency (RF) devices. The ultimate goal is to commercialize such 4G chipset solutions by 2018. Other organizations involved in the consortium include: Parrot SA, ACCO Semiconductor, Sequans Communications, Qualtera, Virtual Open Systems, CEA-LETI, IMS Laboratory in Bordeaux, and the XLIM Lab of the University of Limoges. The program is backed by the French Strategic Investment fund, supervised by the French Public Bank of Investment (BPIFrance). The program was launched in November, 2014, and will be carried out over the course of three years. News of this collaboration is significant because, as Cédric Mayor, Chief Technical Officer, at Presto Engineering, Inc., explained, connected objects and development of 4G solutions represents a huge market potential. “According to industry reports, 50 to 80 billion devices will be connected in the next ten years, and 2 billion will require 4G connectivity,” Mayor told Chip Scale Review. “For example, LTE-4G is perceived as the most promising RF chipset technology for automotive connectivity.”

Chip Scale Review asked Mayor to discuss some of the specific challenges associated with developing a high-volume test solution for RF chipsets. Basically, RF chipsets comprise different elements such as, the analog front-end (e.g., transceivers, multi-band power amplifiers) and the digital circuitry. “As silicon integration increases, dependency between the digital/analog parts represented by the modem and the RF analog part has become tight,” said Mayor. He explained that it is standard practice to perform single tone, multi-tone, and RF structural testing in addition to loopbacks at chip-level testing. This methodology allows most of the unit testing to be in parallel, thereby keeping the test cell RF resources low and the CoT to a reasonable threshold. “However, it is fundamentally different when testing each circuit element at the module-level where calibration and tuning takes place, and which requires modulated signals. There, parallelism is pretty low and capital cost per unit is a key metric.”

The fact that CoT is a major issue for automotive grade RF chipsets can be seen in a comparison between consumer and automotive quality requirements. Mayor pointed out that if one considers the manufacturing of an automotive chip grade 2, according to the Automotive Electronics Council (AEC), the share of burn-in represents almost 5%, while at the same time, the cost of test reaches about 11%, and assembly 25% of the total cost. “When you specifically focus on analog-RF ICs, especially if they require grade 2 certification, the total of burn-in and test costs turns out to reach 19%,” said Mayor. “To compare with that 19%, the same RF IC in its consumer version will barely exhibit a total CoT of 5-6%.” Mayor pointed out that these automotive test costs are the consequences of high quality standards to capture earlier failures and achieve the 0 defect objective.


The new Tech News section will be featuring select quotes, commentary, and data based on questions posed to industry technologists by our senior technical editor, Debra Vogler. If your company has significant technical news to announce and you’re invited to participate in these interviews, be prepared to discuss the science behind your latest breakthrough, the R&D challenges that had to be solved along the way, and the industry challenges driving the need for the technology. Send your technology news releases to editor@chipscalereview.com