Industry News in 3D

A*STAR Institute and Tezzaron Team Up to Develop 2.5D/3D Through-Silicon Interposer Technology

The A*STAR Institute of Microelectronics (IME) and Tezzaron Semiconductor announced a research collaboration agreement to develop and exploit advanced Through Silicon Interposer (TSI) technology. The two organizations will improve and refine the design and manufacture of silicon interposers and work to standardize the process, flows, and process design kits (PDKs). Initial early production devices are already in development based on IME's TSI technology and incorporating 3D-ICs from Tezzaron. Fabrication will be completed in IME's state-of-the-art 300mm R&D Fab. The resulting TSI technology from the collaboration will form the foundation for the TSI Consortium driven by IME, to be launched in early 2012. The TSI Consortium aims to optimize TSI technology through functional demonstration of 2.5D systems for cost effective and performance-driven applications.

"This is a strategic partnership aimed at accelerating the full adoption of 2.5D/3D-IC," commented Professor Dim-Lee Kwong, Executive Director of IME. "To build momentum in customer adoption and technology, IME will launch a TSI Consortium in early 2012, to facilitate greater cooperation between foundry, outsourced semiconductor assembly and test providers (OSATs), equipment vendors and supply chain partners to expedite the integration of the supply chain. In the near future, we plan to develop TSI technology for MEMS and silicon photonics to extend the benefits of 3D-IC technology to a wider range of applications."

"Silicon interposer technology is more than a bridge technology; it is a vital component for heterogeneous system integration. Advanced silicon interposers will be an extremely valuable addition to our 3D-IC offerings," says Robert Patti, CTO of Tezzaron. "This critical collaboration with a leading research institute will allow the technology to reach a broader market quickly and cost effectively."

EV Group Introduces XT Frame Equipment Platform

EV Group, supplier of wafer bonding and lithography equipment for the 3D, MEMS, and nanotechnology markets, introduced an equipment platform, dubbed the XT Frame, that reportedly extends process throughput and tool functionality for its current volume-manufacturing product offerings. Specifically designed to address new requirements from its high-volume manufacturing (HVM) customers, the XT Frame can accommodate up to nine process modules—doubling EVG's previous maximum processing capability for significantly increased throughput.

VG's XT Frame platform supports solutions across all of the company's addressable markets, but is especially beneficial for advanced packaging/3D interconnect applications with TSVs (through-silicon vias). In this area, the new platform can, for example, further enhance the performance of EVG's benchmark temporary bonding/debonding and thin wafer processing systems. "We see an immediate need for greater volume manufacturing capability in the advanced packaging and 3D interconnect space, which is why we've chosen our EVG®850TB/DB system as the first tool to be built on the XT Frame platform." stated Paul Lindner, executive technology director for EV Group.

Demo capabilities for the XT Frame are now available on the EVG®850TB/DB, which can also accommodate EVG's new EZR® (Edge Zone Release) and EZD® (Edge Zone Debond) modules to support ZoneBOND™ technology.

Si2 Announces Founding Members of the Open3D Technical Advisory Board

The Silicon Integration Initiative (Si2) announced founding members of their Open3D Technical Advisory Board (TAB), which is chartered to enable interoperable 2.5D and 3D design flows with open standards, providing common formats and interfaces. The founding members of the Open3D TAB are: ANSYS, Atrenta, Cadence Design Systems, Fraunhofer Institute, GLOBALFOUNDRIES, Intel, Invarian, Mentor Graphics, Qualcomm, R3Logic, STMicroelectronics, and Texas Instruments.

"3D technology touches upon every aspect of the semiconductor design and manufacturing supply-chain," says Andy Brotman, Vice President of Design Infrastructure, GLOBALFOUNDRIES. "As our customers implement this technology, it is in our best interest to participate in the standardization of basic ground rules to enable ultimate success."

Initial areas of focus for Open3D TAB members include developing standards to support:

• Definition of the power distribution network across the die of a 3D stack, a topic for which a contribution has already been received in response to the request for technology (RFT) that was released earlier in the year.
• Thermal design and analysis of an entire 3D stack, including thermal constraints between neighboring dies.
• Expression of design constraints into and out of the path-finding and floorplanning stage of the overall design process

"We believe standards for defining and communicating thermal requirements among different design flows will be critical for advanced 3D solutions, and we applaud Si2's effort to launch working groups to enable this and other cross platform solutions." said Juan Rey, senior director of Calibre engineering, Mentor Graphic.

"With Qualcomm's focus on the mobile market, 3D architectures are definitively in our future," says Dr. Riko Radojcic, Director of Engineering at Qualcomm. "Laying a common foundation of standards in this emerging technology makes it easier to work with our industry partners in producing the next generation of ICs. Standards are a sort of a lubricant that facilitates potentially disruptive technology change."

Brewer Science and SUSS MicroTec Jointly Commercialize Thin Wafer Handling Technology

Brewer Science, Inc., specialists in materials and processes for thin wafer handling, and equipment manufacturer, SUSS MicroTec, are joining forces in commercializing ZoneBOND™ technology for thin wafer handling.

ZoneBOND™ technology is Brewer Science's solution for wafer handling that reportedly provides excellent total thickness variation (TTV) control, high-temperature stability, and low-stress debonding. The company boasts higher yield at debonding, higher throughput, and lower cost of ownership.

SUSS MicroTec is offering the process on the XBC300 and XBS300 platforms, targeted for high volume bonding and debonding of 200/300mm wafers using silicon or glass carriers. Brewer Science offers products specifically designed for the successful implementation of the process including materials for carrier preparation, adhesives, removers, as well as small scale debonding equipment. This joint effort combines both companies' expertise to provide a complete material, equipment and process solution, optimized for each individual customer's process needs.